Files in this item
Timing properties and correctness for structured parallel programs on x86-64 multicores
Item metadata
dc.contributor.author | Hammond, Kevin | |
dc.contributor.author | Brown, Christopher Mark | |
dc.contributor.author | Sarkar, Susmit | |
dc.contributor.editor | van Eekelen, Marko | |
dc.contributor.editor | Dal Lago, Ugo | |
dc.date.accessioned | 2016-12-05T12:30:29Z | |
dc.date.available | 2016-12-05T12:30:29Z | |
dc.date.issued | 2016 | |
dc.identifier | 248130167 | |
dc.identifier | 6e70a1de-b0e5-44e1-a788-5ceb09100b7f | |
dc.identifier | 85007564192 | |
dc.identifier.citation | Hammond , K , Brown , C M & Sarkar , S 2016 , Timing properties and correctness for structured parallel programs on x86-64 multicores . in M van Eekelen & U Dal Lago (eds) , Foundational and Practical Aspects of Resource Analysis : 4th International Workshop, FOPARA 2015, London, UK, April 11, 2015. Revised Selected Papers . Lecture Notes in Computer Science , vol. 9964 , Springer , pp. 101-125 , 4th International Workshop, Foundational and Practical Aspects of Resource Analysis (FOPARA 2015) , London , United Kingdom , 11/04/15 . https://doi.org/10.1007/978-3-319-46559-3_6 | en |
dc.identifier.citation | workshop | en |
dc.identifier.isbn | 9783319465586 | |
dc.identifier.isbn | 9783319465593 | |
dc.identifier.issn | 0302-9743 | |
dc.identifier.other | ORCID: /0000-0002-4326-4562/work/33080443 | |
dc.identifier.other | ORCID: /0000-0001-6030-2885/work/70619194 | |
dc.identifier.other | ORCID: /0000-0002-4259-9213/work/125727585 | |
dc.identifier.uri | https://hdl.handle.net/10023/9935 | |
dc.description.abstract | This paper determines correctness and timing properties for structured parallel programs on x86-64 multicores. Multicore architectures are increasingly common, but real architectures have unpredictable timing properties, and even correctness is not obvious above the relaxed-memory concurrency models that are enforced by commonly-used hardware. This paper takes a rigorous approach to correctness and timing properties, examining common locking protocols from first principles, and extending this through queues to structured parallel constructs. We prove functional correctness and derive simple timing models, and both extend for the first time from low-level primitives to high-level parallel patterns. Our derived high-level timing models for structured parallel programs allow us to accurately predict upper bounds on program execution times on x86-64 multicores. | |
dc.format.extent | 26 | |
dc.format.extent | 729028 | |
dc.language.iso | eng | |
dc.publisher | Springer | |
dc.relation.ispartof | Foundational and Practical Aspects of Resource Analysis | en |
dc.relation.ispartofseries | Lecture Notes in Computer Science | en |
dc.rights | © 2016, Springer International Switzerland. This work has been made available online in accordance with the publisher’s policies. This is the author created, accepted version manuscript following peer review and may differ slightly from the final published version. The final published version of this work is available at link.springer.com / https://doi.org/ 10.1007/978-3-319-46559-3 6 | en |
dc.subject | Multicore | en |
dc.subject | Relaxed-memory concurrency | en |
dc.subject | Functional correctness | en |
dc.subject | Algorithmic skeletons | en |
dc.subject | Operational semantics | en |
dc.subject | Timing models | en |
dc.subject | QA75 Electronic computers. Computer science | en |
dc.subject | QA76 Computer software | en |
dc.subject | TA Engineering (General). Civil engineering (General) | en |
dc.subject | DAS | en |
dc.subject.lcc | QA75 | en |
dc.subject.lcc | QA76 | en |
dc.subject.lcc | TA | en |
dc.title | Timing properties and correctness for structured parallel programs on x86-64 multicores | en |
dc.type | Conference item | en |
dc.contributor.sponsor | European Commission | en |
dc.contributor.institution | University of St Andrews.School of Computer Science | en |
dc.contributor.institution | University of St Andrews.Centre for Interdisciplinary Research in Computational Algebra | en |
dc.identifier.doi | 10.1007/978-3-319-46559-3_6 | |
dc.date.embargoedUntil | 2016-12-04 | |
dc.identifier.grantnumber | 644235 | en |
This item appears in the following Collection(s)
Items in the St Andrews Research Repository are protected by copyright, with all rights reserved, unless otherwise indicated.