Timing properties and correctness for structured parallel programs on x86-64 multicores
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This paper determines correctness and timing properties for structured parallel programs on x86-64 multicores. Multicore architectures are increasingly common, but real architectures have unpredictable timing properties, and even correctness is not obvious above the relaxed-memory concurrency models that are enforced by commonly-used hardware. This paper takes a rigorous approach to correctness and timing properties, examining common locking protocols from first principles, and extending this through queues to structured parallel constructs. We prove functional correctness and derive simple timing models, and both extend for the first time from low-level primitives to high-level parallel patterns. Our derived high-level timing models for structured parallel programs allow us to accurately predict upper bounds on program execution times on x86-64 multicores.
Hammond , K , Brown , C M & Sarkar , S 2016 , Timing properties and correctness for structured parallel programs on x86-64 multicores . in M van Eekelen & U Dal Lago (eds) , Foundational and Practical Aspects of Resource Analysis : 4th International Workshop, FOPARA 2015, London, UK, April 11, 2015. Revised Selected Papers . Lecture Notes in Computer Science , vol. 9964 , Springer , pp. 101-125 , 4th International Workshop, Foundational and Practical Aspects of Resource Analysis (FOPARA 2015) , London , United Kingdom , 11-11 April . DOI: 10.1007/978-3-319-46559-3_6workshop
Foundational and Practical Aspects of Resource Analysis
© 2016, Springer International Switzerland. This work has been made available online in accordance with the publisher’s policies. This is the author created, accepted version manuscript following peer review and may differ slightly from the final published version. The final published version of this work is available at link.springer.com / https://doi.org/ 10.1007/978-3-319-46559-3 6
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