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dc.contributor.authorGoens, Andrés
dc.contributor.authorChakraborty, Soham
dc.contributor.authorSarkar, Susmit
dc.contributor.authorAgarwal, Sukarn
dc.contributor.authorOswald, Nicolai
dc.contributor.authorNagarajan, Vijay
dc.date.accessioned2023-06-08T16:30:07Z
dc.date.available2023-06-08T16:30:07Z
dc.date.issued2023-06-06
dc.identifier283499393
dc.identifiere8080be7-da32-44d9-b424-b80c3c140af1
dc.identifier85161994554
dc.identifier.citationGoens , A , Chakraborty , S , Sarkar , S , Agarwal , S , Oswald , N & Nagarajan , V 2023 , ' Compound memory models ' , Proceedings of the ACM on Programming Languages , vol. 7 , no. PLDI , 153 . https://doi.org/10.1145/3591267en
dc.identifier.issn2475-1421
dc.identifier.otherORCID: /0000-0002-4259-9213/work/136288473
dc.identifier.urihttps://hdl.handle.net/10023/27764
dc.descriptionFunding: This work was funded by the Engineering and Physical Sciences Research Council, through grant references EP/V038699/1 and EP/V028154/1. Submitted to PLDI 2023, which will publish accepted papers in the Proceedings of the ACM in Programming Languages (PACMPL).en
dc.description.abstractToday’s mobile, desktop, and server processors are heterogeneous, consisting not only of CPUs but also GPUs and other accelerators. Such heterogeneous processors are starting to expose a shared memory interface across these devices. Given that each of these individual devices typically support a distinct instruction set architecture and a distinct memory consistency model, it is not clear what the memory consistency model of the heterogeneous machine should be. In this paper, we answer this question by formalizing “compound” consistency models: we present a compositional operational model describing the resulting model when devices with distinct consistency models are fused together. We instantiate our model with the compound x86TSO/PTX model – a CPU enforcing x86TSO and a GPU enforcing the PTX model. A key result is that the x86TSO/PTX compound model retains compiler mappings from the language-based (scoped) C memory model. This means that threads mapped to the x86TSO device can continue to use the already proven C-to-x86TSO compiler mapping, and the same for PTX.
dc.format.extent24
dc.format.extent357455
dc.language.isoeng
dc.relation.ispartofProceedings of the ACM on Programming Languagesen
dc.subjectCompound memory modelsen
dc.subjectConsistency modelsen
dc.subjectCoherence protocolsen
dc.subjectQA75 Electronic computers. Computer scienceen
dc.subjectDASen
dc.subjectMCCen
dc.subjectNCADen
dc.subject.lccQA75en
dc.titleCompound memory modelsen
dc.typeJournal articleen
dc.contributor.institutionUniversity of St Andrews. School of Computer Scienceen
dc.identifier.doi10.1145/3591267
dc.description.statusPeer revieweden


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