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dc.contributor.authorGouicem, Redha
dc.contributor.authorSprokholt, Dennis
dc.contributor.authorRuehl, Jasper
dc.contributor.authorRocha, Rodrigo
dc.contributor.authorSpink, Tom
dc.contributor.authorChakraborty, Soham
dc.contributor.authorBhatotia, Pramod
dc.contributor.editorAamodt, Tor M.
dc.contributor.editorJerger, Natalie Enright
dc.contributor.editorSwift, Michael
dc.date.accessioned2023-01-06T16:30:04Z
dc.date.available2023-01-06T16:30:04Z
dc.date.issued2022-12-21
dc.identifier280203289
dc.identifiercec99969-66ae-4adc-984a-e47c414588c7
dc.identifier85145576440
dc.identifier.citationGouicem , R , Sprokholt , D , Ruehl , J , Rocha , R , Spink , T , Chakraborty , S & Bhatotia , P 2022 , Risotto : a dynamic binary translator for weak memory model architectures . in T M Aamodt , N E Jerger & M Swift (eds) , Proceedings of the 28th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, Volume 1 (ASPLOS 2023) . vol. 1 , ACM , New York, NY , pp. 107–122 , 28th ACM International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS 2023) , Vancouver , Canada , 25/03/23 . https://doi.org/10.1145/3567955.3567962en
dc.identifier.citationconferenceen
dc.identifier.isbn9781450399159
dc.identifier.otherORCID: /0000-0002-7662-3146/work/125303037
dc.identifier.urihttps://hdl.handle.net/10023/26704
dc.description.abstractDynamic Binary Translation (DBT) is a powerful approach to support cross-architecture emulation of unmodified binaries. However, DBT systems face correctness and performance challenges, when emulating concurrent binaries from strong to weak memory consistency architectures. As a matter of fact, we report several translation errors in QEMU, when emulating x86 binaries on Arm hosts. To address these challenges, we propose an end-to-end approach that provides correct and efficient emulation for weak memory model architectures. Our contributions are twofold: First, we formalize QEMU’s intermediate representation’s memory model, and use it to propose formally verified mapping schemes to bridge the strong-on-weak memory consistency mismatch. Second, we implement these verified mappings in Risotto, a QEMU-based DBT system that optimizes memory fence placement while ensuring correctness. Risotto further improves performance via cross-architecture dynamic linking of native shared libraries and faster yet correct translation of compare-and-swap operations. We evaluate Risotto using multi-threaded benchmark suites and real-world applications, and show that Risotto improves the emulation performance by 6.7% on average over “erroneous” QEMU, while ensuring correctness.
dc.format.extent16
dc.format.extent891800
dc.language.isoeng
dc.publisherACM
dc.relation.ispartofProceedings of the 28th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, Volume 1 (ASPLOS 2023)en
dc.subjectBinary translationen
dc.subjectMemory modelsen
dc.subjectFormal verificationen
dc.subjectQA75 Electronic computers. Computer scienceen
dc.subjectQA76 Computer softwareen
dc.subjectDASen
dc.subjectACen
dc.subjectNISen
dc.subjectMCCen
dc.subject.lccQA75en
dc.subject.lccQA76en
dc.titleRisotto : a dynamic binary translator for weak memory model architecturesen
dc.typeConference itemen
dc.contributor.institutionUniversity of St Andrews. School of Computer Scienceen
dc.identifier.doi10.1145/3567955.3567962
dc.date.embargoedUntil2022-12-21


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