Superlinear lower bounds based on ETH
Abstract
We introduce techniques for proving superlinear conditional lower bounds for polynomial time problems. In particular, we show that CircuitSAT for circuits with m gates and log(m) inputs (denoted by log-CircuitSAT) is not decidable in essentially-linear time unless the exponential time hypothesis (ETH) is false and k-Clique is decidable in essentially-linear time in terms of the graph's size for all fixed k. Such conditional lower bounds have previously only been demonstrated relative to the strong exponential time hypothesis (SETH). Our results therefore offer significant progress towards proving unconditional s uperlinear time complexity lower bounds for natural problems in polynomial time.
Citation
Salamon , A Z & Wehar , M 2022 , Superlinear lower bounds based on ETH . in P Berenbrink & B Monmege (eds) , Symposium on Theoretical Aspects of Computer Science (STACS 2022) . , 14 , Leibniz International Proceedings in Informatics , Schloss Dagstuhl - Leibniz-Zentrum für Informatik GmbH , The 39th International Symposium on Theoretical Aspects of Computer Science , 15/03/22 . https://doi.org/10.4230/LIPIcs.STACS.2022.55 conference
Publication
Symposium on Theoretical Aspects of Computer Science (STACS 2022)
ISSN
1868-8969Type
Conference item
Rights
Copyright © 2022 the Author(s). This work has been made available online in accordance with publisher policies or with permission. Permission for further reuse of this content should be sought from the publisher or the rights holder. This is the author created accepted manuscript following peer review and may differ slightly from the final published version. The final published version of this work is available at https://doi.org/10.4230/LIPIcs.STACS.2022.14.
Description
Andras Z. Salamon acknowledges support from EPSRC grants EP/P015638/1 and EP/V027182/1.Collections
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