Files in this item
Relaxing non-interference requirements in parallel plans
Item metadata
dc.contributor.author | Bofill, Miquel | |
dc.contributor.author | Espasa, Joan | |
dc.contributor.author | Villaret, Mateu | |
dc.date.accessioned | 2019-10-15T09:30:04Z | |
dc.date.available | 2019-10-15T09:30:04Z | |
dc.date.issued | 2019-08-01 | |
dc.identifier.citation | Bofill , M , Espasa , J & Villaret , M 2019 , ' Relaxing non-interference requirements in parallel plans ' , Logic Journal of the IGPL , vol. 29 , no. 1 , pp. 45–71 . https://doi.org/10.1093/jigpal/jzz026 | en |
dc.identifier.issn | 1367-0751 | |
dc.identifier.other | PURE: 261776815 | |
dc.identifier.other | PURE UUID: ef444f33-9503-4b5b-93cb-e1434be430b6 | |
dc.identifier.other | crossref: 10.1093/jigpal/jzz026 | |
dc.identifier.other | WOS: 000637315900004 | |
dc.identifier.other | Scopus: 85104952773 | |
dc.identifier.uri | https://hdl.handle.net/10023/18671 | |
dc.description | Funding: UK EPSRC (EP/P015638/1). | en |
dc.description.abstract | The aim of being able to reason about quantities, time or space has been the main objective of the many efforts on the integration of propositional planning with extensions to handle different theories. Planning modulo theories (PMTs) are an approximation inspired by satisfiability modulo theories (SMTs) that generalize the integration of arbitrary theories with propositional planning. Parallel plans are crucial to reduce plan lengths and hence the time needed to reach a feasible plan in many approaches. Parallelization of actions relies on the notion of (non-)interference, which is usually determined syntactically at compile time. In this paper we define a semantic notion of interference between actions in PMT. Apart from being strictly stronger than any syntactic notion of interference, we show how semantic interference can be easily and efficiently checked by calling an off-the-shelf SMT solver at compile time, constituting a technique orthogonal to the solving method. | |
dc.format.extent | 27 | |
dc.language.iso | eng | |
dc.relation.ispartof | Logic Journal of the IGPL | en |
dc.rights | © The Author(s) 2019. Published by Oxford University Press. This is an Open Access article distributed under the terms of the Creative Commons Attribution License (http://creativecommons.org/licenses/by/4.0/), which permits unrestricted reuse, distribution, and reproduction in any medium, provided the original work is properly cited. | en |
dc.subject | Planning | en |
dc.subject | Planning modulo theories | en |
dc.subject | SMT | en |
dc.subject | Planning as satisfiability | en |
dc.subject | Parallel plans | en |
dc.subject | BC Logic | en |
dc.subject | QA75 Electronic computers. Computer science | en |
dc.subject | NDAS | en |
dc.subject.lcc | BC | en |
dc.subject.lcc | QA75 | en |
dc.title | Relaxing non-interference requirements in parallel plans | en |
dc.type | Journal article | en |
dc.description.version | Publisher PDF | en |
dc.contributor.institution | University of St Andrews. School of Computer Science | en |
dc.identifier.doi | https://doi.org/10.1093/jigpal/jzz026 | |
dc.description.status | Peer reviewed | en |
This item appears in the following Collection(s)
Items in the St Andrews Research Repository are protected by copyright, with all rights reserved, unless otherwise indicated.