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dc.contributor.authorYu, Teng
dc.contributor.authorPetoumenos, Pavlos
dc.contributor.authorJanjic, Vladimir
dc.contributor.authorZhu, Mingcan
dc.contributor.authorLeather, Hugh
dc.contributor.authorThomson, John Donald
dc.date.accessioned2019-10-03T09:30:01Z
dc.date.available2019-10-03T09:30:01Z
dc.date.issued2019-11-07
dc.identifier.citationYu , T , Petoumenos , P , Janjic , V , Zhu , M , Leather , H & Thomson , J D 2019 , POSTER : A collaborative multi-factor scheduler for asymmetric multicore processors . in Proceedings of the 28th International Conference on Parallel Architectures and Compilation Techniques (PACT 2019) . , 8891662 , International Conference on Parallel Architectures and Compilation Techniques , IEEE Computer Society , pp. 486-487 , 28th International Conference on Parallel Architectures and Compilation Techniques , Seattle , Washington , United States , 21/09/19 . https://doi.org/10.1109/PACT.2019.00058en
dc.identifier.citationconferenceen
dc.identifier.isbn9781728136141
dc.identifier.isbn9781728136134
dc.identifier.issn1089-795X
dc.identifier.otherPURE: 261471155
dc.identifier.otherPURE UUID: 309e61b1-83fd-46cc-978c-32da00fe9ec4
dc.identifier.otherScopus: 85075446054
dc.identifier.otherWOS: 000550990200050
dc.identifier.urihttps://hdl.handle.net/10023/18604
dc.description.abstractAsymmetric multicore processors (AMP) are necessary for extracting performance in an era of limited power budget and dark silicon. We have efficient symmetric schedulers, efficient asymmetric schedulers for single-threaded workloads, and efficient asymmetric schedulers for single program workloads. What we do not have is a scheduler that can handle all three factors affecting AMP scheduling: core affinity, thread criticality, and scheduling fairness. To address this problem, this paper introduces the first general purpose asymmetry-aware scheduler targeting multi-threaded multi-programmed workloads. It estimates the performance of each thread on each type of core and it identifies communication patterns and bottleneck threads. With this information, the scheduler makes coordinated core assignment and thread selection decisions that still provide each application its fair share of the processor's time. We evaluated our approach on GEM5 through four distinct big.LITTLE configurations and multi-threaded multi-programmed workloads composed of PARSEC and SPLASH2 benchmarks. Compared against the Linux CFS scheduler and a state-of-the-art AMP-aware scheduler, we demonstrate performance gains of up to 25% and 5% to 15% on average depending on the hardware setup.
dc.format.extent2
dc.language.isoeng
dc.publisherIEEE Computer Society
dc.relation.ispartofProceedings of the 28th International Conference on Parallel Architectures and Compilation Techniques (PACT 2019)en
dc.relation.ispartofseriesInternational Conference on Parallel Architectures and Compilation Techniquesen
dc.rightsCopyright © 2019 IEEE. This work has been made available online in accordance with publisher policies or with permission. Permission for further reuse of this content should be sought from the publisher or the rights holder. This is the author created accepted manuscript following peer review and may differ slightly from the final published version. The final published version of this work is available at https://doi.org/10.1109/PACT.2019.00058en
dc.subjectQA75 Electronic computers. Computer scienceen
dc.subjectNSen
dc.subject.lccQA75en
dc.titlePOSTER : A collaborative multi-factor scheduler for asymmetric multicore processorsen
dc.typeConference itemen
dc.description.versionPostprinten
dc.contributor.institutionUniversity of St Andrews. School of Computer Scienceen
dc.identifier.doihttps://doi.org/10.1109/PACT.2019.00058


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