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Gate-tunable, normally-on to normally-off memristance transition inpatterned LaAlO3/SrTiO3 interfaces
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dc.contributor.author | Maier, P. | |
dc.contributor.author | Hartmann, F. | |
dc.contributor.author | Gabel, J. | |
dc.contributor.author | Frank, M. | |
dc.contributor.author | Kuhn, S. | |
dc.contributor.author | Scheiderer, P. | |
dc.contributor.author | Leikert, B. | |
dc.contributor.author | Sing, M. | |
dc.contributor.author | Worschech, L. | |
dc.contributor.author | Claessen, R. | |
dc.contributor.author | Höfling, Sven | |
dc.date.accessioned | 2017-02-17T13:30:10Z | |
dc.date.available | 2017-02-17T13:30:10Z | |
dc.date.issued | 2017 | |
dc.identifier.citation | Maier , P , Hartmann , F , Gabel , J , Frank , M , Kuhn , S , Scheiderer , P , Leikert , B , Sing , M , Worschech , L , Claessen , R & Höfling , S 2017 , ' Gate-tunable, normally-on to normally-off memristance transition inpatterned LaAlO 3 /SrTiO 3 interfaces ' , Applied Physics Letters , vol. 110 , no. 9 , 093506 . https://doi.org/10.1063/1.4977834 | en |
dc.identifier.issn | 0003-6951 | |
dc.identifier.other | PURE: 249183539 | |
dc.identifier.other | PURE UUID: 2314bd45-739f-4126-aeec-2cdf727953ea | |
dc.identifier.other | Scopus: 85014541986 | |
dc.identifier.other | WOS: 000397871600063 | |
dc.identifier.uri | https://hdl.handle.net/10023/10315 | |
dc.description | The authors gratefully acknowledge the support from the state of Bavaria as well as from the Deutsche Forschungsgemeinschaft (FOR1162 and SFB1170). | en |
dc.description.abstract | We report gate-tunable memristive switching in patterned LaAlO3/SrTiO3 interfaces at cryogenic temperatures. The application of voltages in the order of a few volts to the back gate of the device allows controlling and switching on and -off the inherent memory functionality (memristance). For large and small gate voltages a simple non-linear resistance characteristic is observed while a pinched hysteresis loop and memristive switching occurs in an intermediate voltage range. The memristance is further controlled by the density of oxygen vacancies, which is tuned by annealing the sample at 300 °C in nitrogen atmosphere. Depending on the annealing time the memristance at zero gate voltage can be switched on and off leading to normally-on and normally-off memristors. The presented device offers reversible and irreversible control of memristive characteristics by gate voltages and annealing, respectively, which may allow to compensate fabrication variabilities of memristors that complicate the realization of large memristor-based neural networks. | |
dc.language.iso | eng | |
dc.relation.ispartof | Applied Physics Letters | en |
dc.rights | © 2017, the Author(s). This work has been made available online in accordance with the publisher’s policies. This is the author created, accepted version manuscript following peer review and may differ slightly from the final published version. The final published version of this work is available at aip.scitation.org/apl / http://dx.doi.org/10.1063/1.4977834 | en |
dc.subject | QC Physics | en |
dc.subject | T Technology | en |
dc.subject | NDAS | en |
dc.subject.lcc | QC | en |
dc.subject.lcc | T | en |
dc.title | Gate-tunable, normally-on to normally-off memristance transition inpatterned LaAlO3/SrTiO3 interfaces | en |
dc.type | Journal article | en |
dc.description.version | Postprint | en |
dc.contributor.institution | University of St Andrews. School of Physics and Astronomy | en |
dc.contributor.institution | University of St Andrews. Condensed Matter Physics | en |
dc.identifier.doi | https://doi.org/10.1063/1.4977834 | |
dc.description.status | Peer reviewed | en |
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